Network monitoring adaptor for 10 Gbps technology using FPGA

Tomas Martinek, Jan Korenek, Jiri Novotny

This paper describes the architecture of a passive network monitoring adaptor dedicated to 10 Gbps technology. The proposed adaptor is able to produce statistics of input data flows, provide deterministic and stochastic packet sampling and search for specified patterns in packets bodies – payload checking. The architecture is designed for an FPGA platform and composed of several cooperating application specific processors and control units. This paper presents and evaluate its first implementation on existing hardware.